Company: Robert Bosch (BOSCH, Gmbh)
Experience: 4 – 10 years
Analog Design of mixed signal ASICs.
Deep Understanding of CMOS analog design, Good knowledge in semiconductor device physics and CMOS Process and Full custom layout techniques.
Cadence Design Environment, Spectre, HSPICE.
Exposure to Complete Mixed Signal ASIC development life cycle.
Design with High Voltage process (BCD/HVCMOS).
Low Noise Analog Front End (AFE) CMOS Design.
Apply to firstname.lastname@example.org with subject line “CMOS-ASIC-BLR”